ENTITY rom_dec_nop2 IS
PORT (
  vdd    : in  BIT;
  vss    : in  BIT
);
END rom_dec_nop2;

ARCHITECTURE VBE OF rom_dec_nop2 IS

BEGIN
  ASSERT (vdd and not (vss))
  REPORT "power supply is missing on rom_dec_nop2"
  SEVERITY WARNING;
END;