-- Additionneur accumulateur 4 bits

ENTITY addac IS
  PORT (
		a 	: in bit_vector(3 downto 0);
		b 	: in bit_vector(3 downto 0);
		sel	: in bit;
		ck 	: in bit;
		s	: inout bit_vector(3 downto 0);
                vdd     : in bit;
                vss     : in bit
    );
END addac;

ARCHITECTURE struct OF addac IS

-- Liste des signaux

SIGNAL muxout : bit_vector(3 downto 0);
SIGNAL accuout: bit_vector(3 downto 0);

-- Declaration des modeles :

-- Multiplexeur

COMPONENT mux 
  PORT (
		a 	: in bit_vector(3 downto 0);
		b 	: in bit_vector(3 downto 0);
		sel 	: in bit;
		s	: out bit_vector(3 downto 0);
                vdd     : in bit;
                vss     : in bit
    );
END COMPONENT;

-- Additionneur 

COMPONENT  alu 
  PORT (
		a 	: in bit_vector(3 downto 0);
		b 	: in bit_vector(3 downto 0);
		s	: out bit_vector(3 downto 0);
                vdd     : in bit;
                vss     : in bit
    );
END  COMPONENT;

-- Accumulateur

COMPONENT accu 
  PORT (
		i 	: in bit_vector(3 downto 0);
		ck 	: in bit;
		o	: out bit_vector(3 downto 0);
                vdd     : in bit;
                vss     : in bit
    );
END COMPONENT;

-- Assemblage des instances

begin

additionneur 	: alu 	PORT MAP (b,muxout,s,vdd,vss);
accumulateur	: accu	PORT MAP (s,ck,accuout,vdd,vss);
multiplexeur	: mux	PORT MAP (a,accuout,sel,muxout,vdd,vss);

end struct;