list p=16c64 __config _WDT_OFF ;; The purpose of this program is to test gpsim's ability to simulate ;; the Capture Compare peripherals in a midrange pic (e.g. pic16c64). include "p16c64.inc" cblock 0x20 status_temp,w_temp interrupt_temp failures ;; The capTime 16-bit register is a working register that keeps track ;; of the capture edge. capTimeH, capTimeL temp1,temp2 t1,t2,t3 kz endc cblock 0xa0 status_temp_alias,w_temp_alias endc org 0 goto main org 4 ;; ;; Interrupt ;; movwf w_temp swapf STATUS,W movwf status_temp ;; Are peripheral interrupts enabled? btfss INTCON,PEIE goto exit_int bsf STATUS,RP0 movf PIE1 ^ 0x80,W bcf STATUS,RP0 movwf interrupt_temp check_tmr1: btfsc PIR1,TMR1IF btfss interrupt_temp,TMR1IE goto check_ccp1 ;; tmr1 has rolled over bcf PIR1,TMR1IF ; Clear the pending interrupt bsf temp1,0 ; Set a flag to indicate rollover check_ccp1: btfsc PIR1,CCP1IF btfss interrupt_temp,CCP1IE goto exit_int bcf PIR1,CCP1IF ; Clear the pending interrupt bsf temp1,1 ; Set a flag to indicate match exit_int: swapf status_temp,w movwf STATUS swapf w_temp,F swapf w_temp,W retfie main: clrf failures ;Assume success. clrf kz ;kz == Known Zero. ;; disable (primarily) global and peripheral interrupts clrf INTCON ;; ;; CCP test ;; ;; The CCP module is intricately intertwined with the TMR1 ;; module. So first, let's initialize TMR1: ;; Clear all of the bits of the TMR1 control register: ;; this will: ;; Turn the tmr off ;; Select Fosc/4 as the clock source ;; Disable the External oscillator feedback circuit ;; Select a 1:1 prescale ;; In this mode, TMR1 will count instruction cycles. clrf T1CON ; clrf PIR1 ; Clear the interrupt/roll over flag ;; Zero TMR1 clrf TMR1L clrf TMR1H ;; Start the timer bsf T1CON,TMR1ON ccp_test1: movlw (1<