/* TVGA 9440 code added by ARK 29-OCT-97 */
/* (root@ark.dyn.ml.org, ark@lhq.com) [nitc?] */
/* updated 9-NOV-97 to support more regs */
/* this should alllow it to work on 9680's as well */

/* Thanks to Albert Erdmann (theone@miami.gdi.net) */
/* for blindly testing files and mailing me results */
/* for the 9680 registers */

/* The 9680 also uses 84 and 2 pads */
/* EXT+11 and 12 are not used, because vga.c will clobber them */
#define REG96 86

/* I used _regs96 for the 9680 sets so they don't */
/* interfere with the old 8900 or 9440 sets */


/* BIOS mode 0x5B - 800x600x16 */
static const unsigned char g800x600x16_regs96[REG96]={
  0x7F,0x63,0x64,0x82,0x69,0x13,0x6F,0xF0,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x58,0x0B,0x57,0x32,0x00,0x58,0x6F,0xE3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,  /*ATC*/
  0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
  0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x06,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x02,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x16,0x0F,0x0F,0x00,0x10,0x00,            /*Trident CRC*/
  0x10,0x23,                                /*Trident GRFX*/
  0x4B,0x05,0x80,0x00,0x00                  /*Trident Specific*/
};

/* BIOS mode 0x5D - 640x480x256 */
static const unsigned char g640x480x256_regs96[REG96]={
  0x64,0x4F,0x50,0x87,0x54,0x9C,0xF2,0x1F,  /*CRTC*/
  0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
  0xE0,0x83,0xDF,0x50,0x40,0xE0,0xF2,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0xEB,                                     /*MISC*/
  0xD3,0x32,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x0F,0x00,0x00,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0xA4,0x11,0x80,0x00,0x00                  /*Trident Specific*/
};

/* BIOS mode 0x5E - 800x600x256 */
static const unsigned char g800x600x256_regs96[REG96]={
  0x7F,0x63,0x64,0x82,0x68,0x12,0x6F,0xF0,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x58,0x0B,0x57,0x64,0x40,0x58,0x6F,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x32,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x0F,0x00,0x00,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0x4B,0x05,0x80,0x00,0x00                  /*Trident Specific*/
};

/* BIOS mode 0x5F - 1024x768x16 */
static const unsigned char g1024x768x16_regs96[REG96]={
  0x9F,0x7F,0x80,0x82,0x85,0x91,0x1E,0xFD,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x00,0x03,0xFF,0x40,0x00,0x00,0x1E,0xE3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,  /*ATC*/
  0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
  0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x06,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x00,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x16,0x0F,0x00,0x00,0x10,0x00,            /*Trident CRC*/
  0x14,0x23,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x00                  /*Trident Specific*/
};

/* BIOS mode 0x62 - 1024x768x256 */
static const unsigned char g1024x768x256_regs96[REG96]={
  0x9F,0x7F,0x80,0x82,0x84,0x90,0x1E,0xFD,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x00,0x03,0xFF,0x80,0x40,0x00,0x1E,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x30,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x00,0x04,0x00,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x00                  /*Trident Specific*/
};

/* BIOS mode 0x63 - 1280x1024x16 */
static const unsigned char g1280x1024x16_regs96[REG96]={
  0xCF,0x9F,0xA0,0x12,0xA8,0x12,0x15,0xB2,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x01,0x07,0xFF,0x50,0x00,0x01,0x15,0xE3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,  /*ATC*/
  0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
  0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x06,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x00,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x84,0x17,0xCF,0x87,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x16,0x0F,0x00,0x00,0x10,0x00,            /*Trident CRC*/
  0x14,0x27,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x00                  /*Trident Specific*/
};

/* BIOS mode 0x64 - 1280x1024x256 */
static const unsigned char g1280x1024x256_regs96[REG96]={
  0x65,0x4F,0x50,0x88,0x54,0xB9,0x15,0xB2,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x00,0x83,0xFF,0xA0,0x40,0x01,0x15,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x02,0xC2,0xF5,                      /*Trident SEQ*/
  0x28,0x84,0x17,0xCF,0x87,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x00,0x04,0x01,0x00,            /*Trident CRC*/
  0x16,0x27,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x20                  /*Trident Specific*/
};

/* BIOS mode 0x65 - 1600x1200x16 */
static const unsigned char g1600x1200x16_regs96[REG96]={
  0x82,0x63,0x64,0x85,0x68,0x13,0x89,0xF0,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x61,0x04,0x57,0x64,0x00,0x5B,0x84,0xE3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,  /*ATC*/
  0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
  0x01,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x06,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x00,0xC2,0xF5,                      /*Trident SEQ*/
  0x28,0x84,0x27,0xCF,0x87,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x16,0x0F,0x00,0x00,0x10,0x00,            /*Trident CRC*/
  0x1C,0x27,                                /*Trident GRFX*/
  0xBA,0x02,0x80,0x00,0x00                  /*Trident Specific*/
};

/* BIOS mode 0x66 - 1600x1200x256 */
static const unsigned char g1600x1200x256_regs96[REG96]={
  0x82,0x63,0x64,0x85,0x68,0x13,0x89,0xF0,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x61,0x04,0x57,0xC8,0x40,0x5B,0x84,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x32,0xC2,0xF5,                      /*Trident SEQ*/
  0x28,0x84,0x27,0xCF,0x87,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x00,0x00,0x01,0x00,            /*Trident CRC*/
  0x16,0x27,                                /*Trident GRFX*/
  0xBA,0x02,0x80,0x00,0x20                  /*Trident Specific*/
};

/* BIOS mode 0x6B - 320x200x16M */
static const unsigned char g320x200x16M_regs96[REG96]={
  0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,  /*CRTC*/
  0x00,0x4F,0x0D,0x0E,0x00,0x00,0x00,0x00,
  0x9C,0x8E,0x8F,0x28,0x1F,0x96,0xB9,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,  /*ATC*/
  0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
  0x0C,0x00,0x0F,0x08,0x00,
  0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,  /*GRFX*/
  0xFF,
  0x03,0x00,0x03,0x00,0x02,                 /*SEQ*/
  0x67,                                     /*MISC*/
  0xD3,0x00,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x00,0x27,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x16,0x0F,0x0F,0x00,0x09,0x00,            /*Trident CRC*/
  0x10,0x23,                                /*Trident GRFX*/
  0xBA,0x02,0x80,0x00,0xD0                  /*Trident Specific*/
};

/* BIOS mode 0x6C - 640x480x16M */
static const unsigned char g640x480x16M_regs96[REG96]={
  0x64,0x4F,0x50,0x87,0x54,0x9C,0xF2,0x1F,  /*CRTC*/
  0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
  0xE0,0x83,0xDF,0x40,0x40,0xE0,0xF2,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0xEB,                                     /*MISC*/
  0xD3,0x30,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x1C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x00,0x00,0x09,0x00,            /*Trident CRC*/
  0x1E,0x23,                                /*Trident GRFX*/
  0xA4,0x11,0x80,0x00,0xD0                  /*Trident Specific*/
};

/* BIOS mode 0x6D - 800x600x16M */
static const unsigned char g800x600x16M_regs96[REG96]={
  0x7F,0x63,0x64,0x82,0x6B,0x1B,0x72,0xF0,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x58,0x8C,0x57,0x90,0x40,0x58,0x6F,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x30,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x47,0xCF,0x87,0x00,0x1C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x00,0x04,0x09,0x00,            /*Trident CRC*/
  0x1E,0x23,                                /*Trident GRFX*/
  0x30,0x04,0x80,0x00,0xD0                  /*Trident Specific*/
};

/* BIOS mode 0x74 - 640x480x32K */
static const unsigned char g640x480x32K_regs96[REG96]={
  0x64,0x4F,0x50,0x87,0x54,0x9C,0xF2,0x1F,  /*CRTC*/
  0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
  0xE0,0x83,0xDF,0xA0,0x40,0xE0,0xF2,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0xEB,                                     /*MISC*/
  0xD3,0x32,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x0F,0x00,0x05,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0xA4,0x11,0x80,0x00,0x10                  /*Trident Specific*/
};

/* BIOS mode 0x75 - 640x480x64K */
static const unsigned char g640x480x64K_regs96[REG96]={
  0x64,0x4F,0x50,0x87,0x54,0x9C,0xF2,0x1F,  /*CRTC*/
  0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
  0xE0,0x83,0xDF,0xA0,0x40,0xE0,0xF2,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0xEB,                                     /*MISC*/
  0xD3,0x32,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x0F,0x00,0x05,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0xA4,0x11,0x80,0x00,0x30                  /*Trident Specific*/
};

/* BIOS mode 0x76 - 800x600x32K */
static const unsigned char g800x600x32K_regs96[REG96]={
  0x7F,0x63,0x64,0x82,0x68,0x12,0x6F,0xF0,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x58,0x0B,0x57,0xC8,0x40,0x58,0x6F,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x32,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x0F,0x00,0x05,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0x4B,0x05,0x80,0x00,0x10                  /*Trident Specific*/
};

/* BIOS mode 0x77 - 800x600x64K */
static const unsigned char g800x600x64K_regs96[REG96]={
  0x7F,0x63,0x64,0x82,0x68,0x12,0x6F,0xF0,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x58,0x0B,0x57,0xC8,0x40,0x58,0x6F,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x32,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x0F,0x00,0x05,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0x4B,0x05,0x80,0x00,0x30                  /*Trident Specific*/
};

/* BIOS mode 0x78 - 1024x768x32K */
static const unsigned char g1024x768x32K_regs96[REG96]={
  0x9F,0x7F,0x80,0x82,0x84,0x90,0x1E,0xFD,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x00,0x03,0xFF,0x00,0x40,0x00,0x1E,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x30,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x87,0x00,0x1C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x00,0x04,0x05,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x10                  /*Trident Specific*/
};

/* BIOS mode 0x79 - 1024x768x64K */
static const unsigned char g1024x768x64K_regs96[REG96]={
  0x9F,0x7F,0x80,0x82,0x84,0x90,0x1E,0xFD,  /*CRTC*/
  0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,
  0x00,0x03,0xFF,0x00,0x40,0x00,0x1E,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,  /*ATC*/
  0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,
  0x41,0x00,0x0F,0x00,0x00,
  0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0F,  /*GRFX*/
  0xFF,
  0x03,0x01,0x0F,0x00,0x0E,                 /*SEQ*/
  0x2B,                                     /*MISC*/
  0xD3,0x30,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x80,0x87,0xCF,0x87,0x00,0x1C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x56,0x1F,0x00,0x04,0x05,0x00,            /*Trident CRC*/
  0x16,0x23,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x30                  /*Trident Specific*/
};

/* BIOS mode 0x7E - 320x200x32K */
static const unsigned char g320x200x32K_regs96[REG96]={
  0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,  /*CRTC*/
  0x00,0x4F,0x0D,0x0E,0x00,0x00,0x00,0x00,
  0x9C,0x8E,0x8F,0x28,0x1F,0x96,0xB9,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,  /*ATC*/
  0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
  0x0C,0x00,0x0F,0x08,0x00,
  0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,  /*GRFX*/
  0xFF,
  0x03,0x00,0x03,0x00,0x02,                 /*SEQ*/
  0x67,                                     /*MISC*/
  0xD3,0x00,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x00,0x27,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x16,0x0F,0x0F,0x00,0x05,0x00,            /*Trident CRC*/
  0x10,0x23,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x10                  /*Trident Specific*/
};

/* BIOS mode 0x7F - 320x200x64K */
static const unsigned char g320x200x64K_regs96[REG96]={
  0x5F,0x4F,0x50,0x82,0x55,0x81,0xBF,0x1F,  /*CRTC*/
  0x00,0x4F,0x0D,0x0E,0x00,0x00,0x00,0x00,
  0x9C,0x8E,0x8F,0x28,0x1F,0x96,0xB9,0xA3,
  0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,  /*ATC*/
  0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
  0x0C,0x00,0x0F,0x08,0x00,
  0x00,0x00,0x00,0x00,0x00,0x10,0x0E,0x00,  /*GRFX*/
  0xFF,
  0x03,0x00,0x03,0x00,0x02,                 /*SEQ*/
  0x67,                                     /*MISC*/
  0xD3,0x00,0xC2,0xF5,                      /*Trident SEQ*/
  0x4A,0x00,0x27,0xCF,0x07,0x00,0x0C,       /*Trident CRTC*/
  0x00,0x00,                                /*Pad for 8900 in vga.c*/
  0x16,0x0F,0x0F,0x00,0x05,0x00,            /*Trident CRC*/
  0x10,0x23,                                /*Trident GRFX*/
  0x45,0x06,0x80,0x00,0x30                  /*Trident Specific*/
};